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HV219 HV219
Initial Release
Low Charge Injection 8-Channel High Voltage Analog Switch
Features
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General Description
The Supertex HV219 is a low switch resistance, low charge injection 8-channel 200V analog switch integrated circuit (IC) intended primarily for medical ultrasound imaging. The device can also be used for NDE, non-destructive evaluation applications. The HV219 is a lower switch resistance, 11ohms versus 22ohms, version of the Supertex HV20220 device. The lower switch resistance will help reduce insertion loss. It has the same pin configuration as that of the Supertex HV20220PJ and the HV20220FG. The device is manufactured using Supertex's HVCMOS (high voltage CMOS) technology with high voltage bilateral DMOS structures for the outputs and low voltage CMOS logic for the input control. The outputs are configured as eight independent single pole single throw 11 ohms analog switches. The input logic is an 8bit serial to parallel shift register followed by an 8-bit parallel latch. The switch states are determined by the data in the latch. Logic high will correspond to a closed switch and logic low as an opened switch. The HV219 is designed to operate on various combinations of high voltage supplies. For example the VPP and VNN supplies can be: +40V/-160V, +100V/-100V, or +160V/-40V. This allows the user to maximize the signal voltage for uni-polar negative, bi-polar, or unipolar positive.
HVCMOS technology for high performance Very low quiescent power dissipation-10A Output On-resistance typically 11 Low parasitic capacitance DC to 10MHz analog signal frequency -60dB typical off-isolation at 5MHz CMOS logic circuitry for low power Excellent noise immunity Serial shift register logic control with latches Flexible operating supply voltages Surface mount packages
Applications
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Medical Ultrasound Imaging Non-Destructive Evaluation
Block Diagram
DIN
LATCHES D LE CL
LEVEL SHIFTERS
OUTPUT SWITCHES
SW0
D LE CL CLK D LE CL
SW1
SW2
D LE CL 8 BIT SHIFT REGISTER D LE CL
SW3
SW4
D LE CL
SW5
DOUT
D LE CL
SW6
D LE CL
SW7
VDD
GND
LE
CL
VNN VPP
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HV219
Ordering Information
VPP-VNN 200V Maximum Analog Switch Voltage 180VP-P Package Options 28-lead plastic chip carrier PLCC 48-lead TQFP HV219PJ HV219FG Die HV219X
Absolute Maximum Ratings*
VDD Logic supply VPP-VNN differential supply VPP Positive supply VNN Negative supply Logic input voltage Analog signal range Peak analog signal current Storage temperature Power dissipation -0.5V to +15V 220V -0.5V to VNN+200V +0.5V to -200V -0.5V to VDD+0.3V VNN to VPP 3.0A -65C to +125C 28-Lead PLCC 1.2W 48 Lead TQFP 1.0W
*Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to device ground.
Operating Conditions
Symbol VDD VPP VNN VIH VIL VSIG TA Parameter Logic power supply Positive high voltage supply Negative high voltage supply Input logic voltage high Input logic voltage low Analog signal voltage peak to peak Operating free air temperature Value 4.5V to 13.2V 40V to VNN+200V -40V to -160V VDD-1.5V to VDD 0V to 1.5V VNN+10V to VPP-10V 0C to 70C
2
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HV219 Electrical Characteristics
DC Characteristics (over recommended operating conditions unless otherwise noted)
Sym Parameter Min 0C Max 15 13 13 9 12 11 20 Min +25C Typ 13 11 11 9 10 8 5.0 8 5.0 300 500 1.0 100 100 10 -10 10 -10 3.0 6.5 IPP Average VPP supply current 4.0 4.0 6.5 INN Average VNN supply current 4.0 4.0 IDD IDDQ ISOR ISINK CIN Average VDD supply current Quiescent VDD supply current Data out source current Data out sink current Logic input capacitance 4.0 10 0.45 0.45 10 0.45 0.45 0.70 0.70 10 3.0 10 300 500 50 -50 50 -50 2.0 50 7.0 5.0 5.0 7.0 5.0 5.0 4.0 10 0.40 0.40 10 2.0 8.0 5.5 5.5 8.0 5.5 5.5 4.0 10 mA A mA mA pF mA mA 15 300 500 Max 19 14 14 12 13 13 20 +70C Min Max 24 16 15 14 15 14 20 Units Conditions VPP = +40V ISIG = 5mA VNN = -160V ISIG = 200mA VPP = +100V ISIG = 5mA VNN = -100V ISIG = 200mA VPP = +160V ISIG = 5mA VNN = -40V ISIG = 200mA ISIG = 5mA, VPP = +100V, VNN = -100V VSIG = VPP-10V, ISIG = 1A VSIG = VPP-10V and VNN+10V RLOAD = 100K RLOAD = 100K All switches off All switches off All switches on, ISW = 5mA All switches on, ISW = 5mA VSIG duty cycle < 0.1% Duty cycle = 50% VPP = +40V VNN = -160V VPP = +100V VNN = -100V All output VPP = +160V switches are turning On VNN = -40V and Off at VPP = +40V 50KHz with VNN = -160V no load. VPP = +100V VNN = -100V VPP = +160V VNN = -40V fCLK = 5MHz, VDD = 5.0V All logic inputs are static VOUT = VDD-0.7V VOUT = 0.7V
RONS
Small Signal Switch On-Resistance
Ohms
RONS RONL ISOL
IPPQ INNQ IPPQ INNQ fSW
Small Signal Switch On-Resistance Matching Large Signal Switch On-Resistance Switch Off Leakage per Switch DC offset Switch off DC offset Switch on Quiescent VPP supply current Quiescent VNN supply current Quiescent VPP supply current Quiescent VNN supply current Switch output peak current Output switch frequency
% Ohms A mV mV A A A A A kHz
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A042705
HV219 Electrical Characteristics
AC Characteristics (over recommended operating conditions, V
Sym tSD tWLE tDO twCL tSU tH fCLK tr,tf Ton Toff Parameter Set Up Time Before LE Rises Time Width of LE Clock Delay Time to Data out Time Width of CL Set Up Time Data to Clock Hold Time Data from Clock Clock Frequency Clock rise and fall Times Turn on Time Turn off Time 0C Min Max 150 150 150 150 15 35 5.0 50 5.0 5.0 20 dv/dt Maximum VSIG Slew Rate 20 20 KO Kcr Iid CSG(off) CSG(on) +VSPK -VSPK +VSPK -VSPK +VSPK -VSPK 1450 Output Voltage Spike Off Isolation Switch Crosstalk Output Switch Isolation Diode Current Off Capacitance SW to Gnd On Capacitance SW to Gnd -30 -58 300 14 40 25 60 14 40 20 50 -30 -58 -60 300 25 60 150 200 150 200 150 200 14 40 -33 150 15 35 8.0 5.0 50 5.0 5.0 20 20 20 -30 -58 dB 300 25 60 mA pF pF mV Min 150 150 150 150 20 35 5.0 50 5.0 5.0 20 20 20 dB V/ns
DD
=5.0V, unless otherwise noted)
+25C Typ
Max
+70C Min Max 150 150 150
Unit s ns ns ns ns ns ns MHz ns s s
Conditions
50% duty cycle, fDATA = fCLK/2 VSIG = VPP-10V, RLOAD = 10K VSIG = VPP-10V, RLOAD = 10K VPP = +40V, VNN = -160V VPP = +100V, VNN = -100V VPP = +160V, VNN = -40V F = 5MHz, 1K//15pF load F = 5.0MHz, 50 load F = 5.0MHz, 50 load 300ns pulse width, 2.0% duty cycle 0V, f = 1MHz 0V, f = 1MHz VPP = +40V, VNN = -160V, RLOAD = 50ohm VPP = +100V, VNN = -100V, RLOAD = 50ohm VPP = +160V, VNN = -40V, RLOAD = 50ohm VPP = +40V, VNN = -160V, VSIG = 0V VPP = +100V, VNN = -100V, VSIG = 0V VPP = +160V, VNN = -40V, VSIG = 0V
mV
mV
Q
Charge Injection
1050
pC
550
4
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HV219
Power Up/Down Sequence
1) 2) 3) Power up/down sequence is arbitrary except GND must be powered up first and powered down last. This applies for applications powering GND of the IC with different voltages. Vsig must always be at or in between VPP and VNN or floating during power up/down transition. Rise and fall times of the power supplies VDD, VPP, and VNN should not be less than 1.0ms.
Logic Truth Table
D0 L H Data in the 8-bit Shift Register D1 D2 D3 D4 D5 D6 D7
LE
CL L L L L L L L L L L L L L L L L L H SW0 OFF ON SW1 SW2
Output Switch State SW3 SW4 SW5
SW6
SW7
L H L H L H L H L H L H L H X X
X X
Notes: 1. 2. 3. 4. 5. 6.
X X
X X
X X
X X
X X
X X
L L L L L L L L L L L L L L L L H X
OFF ON OFF ON OFF ON OFF ON OFF ON OFF ON OFF ON OFF OFF HOLD PREVIOUS STATE OFF OFF OFF OFF OFF OFF
The eight switches operate independently. Serial data is clocked in on the L to H transition clock. The switches go to a state retaining their present condition at the rising edge of the LE . When LE is low, the shift register data flows through the latch. Shift register clocking has no effect on the switch states if LE is high. The clear input overrides all other inputs.
Logic Timing Waveform
DN-1 DATA IN
50%
DN
50%
DN+1
LE
50%
50% t WLE t SD
CLOCK
t SU
50% t t h
50%
DD
DATA OUT
50% t t ON
OFF
VOUT OFF
(TYP)
90%
ON
10%
CLR
50%
50%
t WCL
5
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HV219
Test Circuits
VPP -10V RL VOUT VOUT 10K ISOL
VPP -10V
VNN +10V
100K
RL
VPP VNN
VPP VNN
VDD GND
5V
VPP VNN
VPP VNN
VDD GND
5V
VPP VNN
VPP VNN
VDD GND
5V
Switch OFF Leakage
DC Offset ON/OFF
TON /TOFF Test Circuit
VIN = 10 VP-P @5MHz VSIG VOUT RL IID VNN
VIN = 10 VP-P @5MHz 50 NC 50
VPP VNN
VPP VNN
VDD GND VOUT VIN
5V
VPP VNN
VPP VNN
VDD GND
5V
VPP VNN
VPP VNN
VDD GND VOUT VIN
5V
KO = 20Log
KCR = 20Log
OFF Isolation
Isolation Diode Current
Crosstalk
VOUT VOUT 1000pF
+VSPK VOUT -V SPK 50
VSIG 1K RL
VPP VNN
VPP VNN
VDD GND
5V
VPP VNN
VPP VNN
VDD GND
5V
Q = 1000pF x VOUT
Charge Injection
Output Voltage Spike
6
A042705
HV219
28-Pin J-lead Package Outline
0.450 0.005 (11.430 0.127)
D1
Pin Configuration
28 Pin J-Lead Pin Function 1 SW3 2 SW3 3 SW2 4 SW2 5 SW1 6 SW1 7 SW0 8 SW0 9 N/C 10 VPP 11 N/C 12 VNN 13 GND 14 VDD Pin 15 16 17 18 19 20 21 22 23 24 25 26 27 28 Function N/C DIN CLK LE CL DOUT SW7 SW7 SW6 SW6 SW5 SW5 SW4 SW4
Pin #1
D
B
0.480 0.010 (12.192 0.254)
0.027 0.003 (0.6858 0.0762)
e
0.050 0.010 (1.270 0.254) 0.1725 0.0075 (4.3815 0.1905)
A
A2
0.020 min. (0.508)
0.410 0.010 (10.414 0.254) B.C. of Bend Radii
Q
0.110 0.010 (2.794 0.254)
25 26 27 28 1 2 3 4 5
24
23
22
21
20
19 18 17 16 15 14 13 12
6
7
8
9
10
11
Measurement Legend =
Top View 28-Pin J-Lead Package
Dimensions in Inches (Dimensions in Millimeters)
7
A042705
HV219
48-Pin TQFP
D, E
Pin Configuration
0.354 0.010 (8.992 0.254)
0.024 0.008 (0.610 0.2032)
L
0.354 0.010 (8.992 0.254) 0.275 0.004 (6.985 0.102)
D1, E1
0 - 7
0.275 0.004 (6.985 0.1016)
A
0.059 0.004 (1.4986 0.102)
A2
0.055 0.004 (1.397 0.102)
0.020 BSC (0.508)
0.039 TYP. (0.991)
48-Pin TQFP Pin Function 1 SW5 2 N/C 3 SW4 4 N/C 5 SW4 6 N/C 7 N/C 8 SW3 9 N/C 10 SW3 11 N/C 12 SW2 13 N/C 14 SW2 15 N/C 16 SW1 17 N/C 18 SW1 19 N/C 20 SW0 21 N/C 22 SW0 23 N/C 24 VPP
Pin 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48
Function VNN N/C N/C GND VDD N/C N/C N/C DIN CLK LE CLR DOUT N/C SW7 N/C SW7 N/C SW6 N/C SW6 N/C SW5 N/C
Pin 1
HV219
Pin #1
Pin #1
Measurement Legend =
Dimensions in Inches (Dimensions in Millimeters)
Pin 12
top view 48-pin TQFP
A042705
8
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